The CIP Spec has some generic definitions for the bits in that word in Volume 3, table 5A-2.3 and table 5A-2.4, and requires that the reserved/vendor bits there, if used, be declared in the device’s EDS file.
Bit 0: "Owned". Not applicable to a processor, I would think.
Bit 1: Reserved.
Bit 2: "Configured". Probably always true except when at factory default.
Bit 3: Reserved.
Bits 4-7: 4-bit integer extended status code:
0: Self test/unknown
1: Firmware updating
2: Any Faulted I/O connections
3: No I/O connections
4: Bad Non-volatile config
5: Any major fault (also see bits 10 & 11)
6: Any Running I/O Connections
7: Any Idle I/O Connections
8: Ignore
9: Reserved
10-15: Vendor specific (Not in EDS)
Bit 8: Minor Recoverable Fault
Bit 9: Minor Unrecoverable Fault
Bit 10: Major Recoverable Fault
Bit 11: Major Unrecoverable Fault
Bits 12-15: Vendor Specific (Must be in EDS)