So I’m doing my senior design project next semester at University of North Carolina at Charlotte, and the whole RISC-V ISA has peaked my interest. I’ve purchase some hardware to play with: A FPGA board from Future Electronics, and an Arduino-type board from SiFive. I would love some insight/opinions on this topic…ahem,ahem @pturmel, @PGriffith, @JordanCClark 
Arduino?!? cough-cough-hack
I’m more of a Propeller guy, myself… https://www.parallax.com/catalog/microcontrollers/propeller.
One of my ‘one of these days’ projects was to make a Prop plate for a Raspi. All the realtime processing on the prop, with storage / opc / development on the Pi. Yep… one of these days…
Did you have a project in mind?
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I don’t have a specific project in mind just yet, still got my feelers out. I have some assembly and Verilog experience, but I’m still a little green. I’ve ordered two books on risc-v, one on the architecture and one on the assembly language. The SiFive website has a portal to design your own custom cores for their processor, which seems neat. I’m still in the thought experiment phase right now, no hard ideas. My plan is to study the risc-v implementation, find a niche that would benefit from its ISA, design a custom core, develop the hardware on the fpga, and possibly make a prototype pcb. Most likely I won’t be able to afford having the custom core manufactured, so I will have it in the design but use the standard core for the real thing. Also, since you had such a reaction to the mention of Arduino, from now on I am going to end all my replies to your posts with the word Arduino 
Arduino
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I’m too lazy busy to mess with arduinos, though the lilypad looks awfully cool. I think something is wrong with @JordanCClark’s geek affinity scale.
It’s been thirty years since I did anything with gate array technology, so any suggestions I make would undoubtedly undershoot the state of the art.
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My wife just says there something wrong with me in general. Usually with the phrase “You’re so special”…
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My in-laws like to trade names for Christmas. I was asked about things that I would like, so I said a Raspberry Pi to run RetroPi. I got some strange looks so I know the feeling 
In case you guys are interested, I will post project updates. My FPGA board is due to be in today 
Also, Arduino.
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-sigh- I've created something evil... 
But yeah, let us know how things progress. I always like seeing friends get ahead in fun stuff.
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Please do keep us apprised… brings back ancient memories. (:
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I haven’t been able to play with my FPGA just yet, I had to jump through several hoops to get the free license for programming. So mulling over some ideas, I’m thinking about incorporating risc-v processors with Hex-Five security, and freeRTOS to implement an idea of a secure IOT network of some sort. I don’t have to create something groundbreaking, but it needs to be a sound concept. Any insight into this from a security, hardware, or software perspective?
@pturmel @JordanCClark
My project proposal draft is due the 12th. This is my current plan…
First is to upload the appropriate bitstream to my Digilent Arty A7 FPGA board. The bitstream creates a RISC-V soft core for developing. Next, I’m going to upload the Hex-Five Multizone Security. Multizone is a nanokernel that defines security zones for the applications used in the hardware. Multizone has InterZone Messaging. The messenger relays data between each zone and executes any commands at the machine level. This means that none of the applications in use (like TCP/IP, SSL, any wireless connectivity, RTOS) use any shared memory and never directly talk to each other. This zero trust model provides a new level of security. Since the applications are separated in memory and compiled individually, if one of them is compromised, it doesn’t have any secrets to share from other zones and the infiltration cannot propagate to the other zones. The zones are software defined, so it can be easily changed to fit different needs (before firmware installed), but the security is implemented at the hardware level because of RISC-V’s PMP (physical memory protection) registers. With this in mind…
I’m going to connect to some type of hardware for control/monitoring via FPGA GPIO. The SSL application, TCP/IP, RTOS, etc will all have their own personal zone. The hardware, like robotic arm, is controlled with a command terminal over UART, but I’m going to have an Ignition Client do the control and display any monitoring info. Would that be implemented with Ignition’s serial module?
Hope I didn’t geek out on you too much 
Yup. Use a background reader thread.
Nah, this fits right in with this crowd. (:
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I'm not ready to try this yet, but I want to get my ducks in a row before hand. I have the serial modules, gateway and client, installed which will let me open up a serial port to listen to. I assume I would use system.serial.openSerialPort to make the connection. I'm unsure about how to make it
When I connect to the FPGA with Ubuntu terminal, it looks something like $ screen /dev/ttyUSB0 115200
Do I need to set the baud rate in Ignition somehow or do I need go between hardware? Finally, one of the example programs prints out the sifive logo over the serial port. What would be a good way to display the output in the Ignition client?
Appreciate it!
Yes, set the baud rate and other serial parameters when you open the port in Ignition.
Consider using a text-area set to non-editable to display your text. I would use a string client tag that is written by the background task with the last 1000 lines as data arrives.
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Ah, I didn’t see the system.serial.configureSerialPort, which allows for the baud rate configuration. The text-area component and client tag sounds like it fits the bill. 
This gives me enough of a precursor to verify what I’m planning will work as needed. I’m excited, lol. 
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Project Update:
My dev hardware is being switched over to the HiFive1 RevB board as it fits all of my project requirements. I’m also switching over to using a new type-safe language that is also suitable for embedded systems. It’s called Rust, and it has an interesting concept of ownership. This concept provides its type-safety and has an associated lifespan which eliminates the need for a garbage collector. It also offers safer concurrency, I’m still a newbie with its capabilities but I’m getting there. I will be coding my project in Rust. I highly suggest checking it out. Finally, I’m looking into using an embedded OS called Tock which is also written in Rust. I still have a long way to go, but I’m liking where I’m headed 
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This semester has been insane, but I did get my senior project done
SD2_Poster.pdf (852.8 KB)
If you are curious, my repo is at GitHub - dkhayes117/5eroRISC: Senior Design Project Fall 2020
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My project won 2nd place for best project In case you are curious…
Fall 2020 Senior Design 2 Project Presentations | Industrial Solutions Lab | UNC Charlotte
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Congratulations! Good work.
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